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Alif Semiconductor /AE512F80F55D5AS_CM55_HE_View /LPUART /UART_SBCR

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Interpret as UART_SBCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (Val_0x0)SBCB

SBCB=Val_0x0

Description

Shadow Break Control Register

Fields

SBCB

This is a shadow bit for the UART_LCR[BC] bit, used to remove the burden of having to perform a read / modify write on the UART_LCR. It is used to cause a break condition to be transmitted to the receiving device. If SBCB is set to one the UART_TX signal is forced to the spacing (logic 0) state. When not in Loopback mode (UART_MCR[LOOPBACK] set to 0), the UART_TX signal is forced low until the UART_LCR[BC] bit is cleared.

0 (Val_0x0): No spacing on UART_TX signal

1 (Val_0x1): UART_TX forced to the spacing

Links

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Register License

THIS SOFTWARE IS PROVIDED “AS IS”. NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. ALIF SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data